5nm Technology Portfolio Highlights
- High speed multi-protocol 112-Gbps, 64-Gbps and 32-Gbps SerDes cores
- HBM2e and HBM3 protocol solution
- High bandwidth Die2Die PHY for multi-die SoC and silicon disaggregation
- High performance and high-density standard cell libraries and memory compilers
- Advanced packaging solutions including multi-chip-modules and 2.5D stacking
Benefits of 5nm ASIC Platform vs. Previous Generation
- 2x increase in on-die computation for training and inference applications
- 2x to 4x increase in memory bandwidth with HBM2e and HBM3 PHY
- 2x higher bandwidth serial links with 112-Gbps SerDes
- Up to 30% reduction in power per given work function
- System size and cost reduction with advanced packaging solutions
“Broadcom’s pioneering ASIC leverages both N5, the industry’s most advanced silicon technology, and our high-performance CoWoS integration solution to address the demanding requirements of next-generation cloud and data center applications,” said Dr.
“This first-to-market 5nm ASIC extends Broadcom’s embedded SoC leadership and paves the way for new innovations across AI, HPC, 5G and hyperscale infrastructure applications,” said Frank Ostojic, senior vice president and general manager of the ASIC Product Division at Broadcom. “Our innovative IP, proven design methodology and partnership with TSMC continue to provide leadership solutions with power, performance and time to market advantage for our customers.”
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